1. Field of the Invention
This invention relates to a method for mounting a semiconductor chip on a substrate and to a semiconductor device that is adapted for mounting on a substrate.
2. Description of the Related Art
With the rapid advancement in semiconductor fabrication technology, the bonding pads on the surface of a semiconductor chip are getting smaller in size, and the distance between adjacent bonding pads are getting shorter. These can create difficulty when connecting the semiconductor chip to an external circuit, and can affect adversely the production yield.
In the co-pending U.S. patent application Ser. No. 09/564,989, the applicant disclosed a method for mounting a semiconductor chip on a substrate to prepare a semiconductor device. The substrate has a chip-mounting region provided with a plurality of solder points. The semiconductor chip has a pad-mounting surface provided with a plurality of bonding pads, which are to be connected to corresponding ones of the solder points and which are disposed on the pad-mounting surface at locations that are offset from locations of the corresponding ones of the solder points on the chip-mounting region. The method involves the steps of forming conductive bodies in a conductor-forming mold and transferring the conductive bodies from the mold to the pad-mounting surface of the semiconductor chip via known transfer printing techniques. Each conductive body has an extension portion electrically connected to the respective one of the bonding pads, and a connection portion extending to the location corresponding to that of the respective one of the solder points on the chip-mounting region of the substrate.
In the co-pending U.S. patent application Ser. No. 09/688,855, the applicant disclosed another method for mounting a semiconductor chip on a substrate to prepare a semiconductor device. Similar to the co-pending U.S. patent application Ser. No. 09/564,989, the substrate has a chip-mounting region provided with a plurality of solder points. The semiconductor chip has a pad-mounting surface provided with a plurality of bonding pads, which are to be connected to corresponding ones of the solder points and which are disposed on the pad-mounting surface at locations that are offset from locations of the corresponding ones of the solder points on the chip-mounting region. The method involves the steps of forming a photoresist layer on the pad-mounting surface with a plurality of contact receiving cavities, each of which is registered with and exposes a portion of one of the bonding pads on the pad-mounting surface, and forming a plurality of conductive bodies, each of which is electrically connected to one of the bonding pads, and each of which has an anchor portion filling one of the contact receiving cavities and connected to the respective bonding pad, an extension portion extending from the anchor portion and formed on the surface of the photoresist layer, and a contact portion protruding from one end of the extension portion and formed on the surface of the photoresist layer opposite to the anchor portion. The contact portion is disposed at the position corresponding to a respective one of the solder points on the chip-mounting region of the substrate.
The main object of the present invention is to provide a method of the type disclosed in the aforesaid co-pending U.S. patent application Ser. No. 09/564,989, for mounting a semiconductor chip on a substrate so as to overcome the aforesaid drawback.
Another object of the present invention is to provide a semiconductor device of the type disclosed in the aforesaid co-pending U.S. patent application Ser. No. 09/564,989 that is capable of overcoming the aforesaid drawback.
Still another object of the present invention is to provide a method of the type disclosed in the aforesaid co-pending U.S. patent application Ser. No. 09/688,855 for mounting a semiconductor chip on a substrate so as to overcome the aforesaid drawback.
A further object of the present invention is to provide a semiconductor device of the type disclosed in the aforesaid co-pending U.S. patent application Ser. No. 09/688,855 that is capable of overcoming the aforesaid drawback.
According to one aspect of the present invention, there is provided a method for mounting a semiconductor chip on a substrate having a chip-mounting region provided with a plurality of solder points. The semiconductor chip has a pad-mounting surface provided with a plurality of bonding pads, which are to be connected to corresponding ones of the solder points and which are disposed on the pad-mounting surface at locations that are offset from locations of the corresponding ones of the solder points on the chip-mounting region. The method comprises the steps of: forming a plurality of conductive inner bumps, each of which is electrically connected to and is formed to protrude from a respective one of the bonding pads; forming a photoresist layer on the pad-mounting surface, wherein the inner bumps are embedded in the photoresist layer; forming access holes in the photoresist layer, each of which is registered with and exposes at least a portion of a respective one of the inner bumps; and forming a plurality of conductive bodies, each of which has an extension portion, and an anchor portion and a contact portion on opposite ends of the extension portion, the anchor portion filling a respective one of the access holes and connecting electrically with and encapsulating at least a portion of a respective one of the inner bumps, the contact portion being formed on an upper surface of the photoresist layer opposite to the pad-mounting surface and being disposed at the location corresponding to a respective one of the solder points on the chip-mounting region of the substrate, the extension portion being formed on the upper surface of the photoresist layer and interconnecting the anchor and contact portions.
According to another aspect of the present invention, a semiconductor device is adapted for mounting on a substrate having a chip-mounting region provided with a plurality of solder points. The semiconductor device comprises: a semiconductor chip having a pad-mounting surface provided with a plurality of bonding pads which are disposed on the pad-mounting surface at locations that are offset from locations of corresponding ones of the solder points on the chip-mounting region; a plurality of conductive inner bumps electrically and respectively connected to and protruding from the bonding pads; a photoresist layer formed on the pad-mounting surface of the semiconductor chip, the photoresist layer being formed with a plurality of access holes registered with and exposing at least a portion of a respective one of the inner bumps on the bonding pads; and a plurality of conductive bodies, each of which has an extension portion, and an anchor portion and a contact portion on opposite ends of the extension portion, the anchor portion filling a respective one of the access holes and connecting electrically with and encapsulating at least a portion of a respective one of the inner bumps, the contact portion being formed on an upper surface of the photoresist layer opposite to the pad-mounting surface and being disposed at the location corresponding to a respective one of the solder points on the chip-mounting region of the substrate, the extension portion being formed on the upper surface of the photoresist layer and interconnecting the anchor and contact portions.
According to still another aspect of the present invention, there is provided a method for mounting a semiconductor chip on a substrate having a chip-mounting region provided with a plurality of solder points. The semiconductor chip has a pad-mounting surface provided with a plurality of bonding pads, which are to be connected to corresponding ones of the solder points and which are disposed on the pad-mounting surface at locations that are offset from locations of the corresponding ones of the solder points on the chip-mounting region. The method comprises the steps of: forming a plurality of conductive inner bumps, each of which is electrically connected to and is formed to protrude from a respective one of the bonding pads; and forming a plurality of spaced apart conductive bodies, each of which has an extension portion, and an anchor portion and a contact portion on opposite ends of the extension portion, the anchor portion connecting electrically with and encapsulating a respective one of the inner bumps, the contact portion being formed on said pad-mounting surface and being disposed at the location corresponding to a respective one of the solder points on the chip-mounting region of the substrate, the extension portion being formed on the pad-mounting surface and interconnecting the anchor and contact portions.
According to a further aspect of the present invention, a semiconductor device is adapted for mounting on a substrate having a chip-mounting region provided with a plurality of solder points. The semiconductor device comprises: a semiconductor chip having a pad-mounting surface provided with a plurality of bonding pads which are disposed on the pad-mounting surface at locations that are offset from locations of corresponding ones of the solder points on the chip-mounting region; a plurality of conductive inner bumps electrically and respectively connected to and protruding from the bonding pads; and a plurality of conductive bodies, each of which has an extension portion, and an anchor portion and a contact portion on opposite ends of the extension portion, the anchor portion connecting electrically with and encapsulating a respective one of the inner bumps, the contact portion being formed on the pad-mounting surface and being disposed at the location corresponding to a respective one of the solder points on the chip-mounting region of the substrate, the extension portion being formed on the pad-mounting surface and interconnecting the anchor and contact portions.